FIG. 6 represents an equivalent circuit of a conventional DC regulated power supply.
The power supply receives input voltage Vi and outputs it as output voltage Vo via a PNP-type output transistor Q10. In addition, the power supply supplies current Io to a load RL according to a base current that flows into a driver 11 from the output transistor Q10. The output voltage Vo is divided by a voltage divider made up of serially connected voltage dividing resistors RA and RB, and supplied to an error amplifier 12 as a feedback voltage Vadj. The error amplifier 12 also receives a constant reference voltage Vref generated by a reference voltage source 13. The error amplifier 12 amplifies a difference between the feedback voltage Vadj and the reference voltage Vref and outputs a control voltage. Based on the control voltage, the driver 11 controls the base current of the output transistor Q10, so as to regulate the output voltage Vo. In this way, the power supply is able to apply output voltage Vo of a constant level to the load RL, regardless of fluctuations in input voltage Vi or load current.
FIG. 7 represents a circuit diagram of the error amplifier 12. The error amplifier 12 includes transistors Q15 and Q16 that make up a differential pair. The base of the transistor Q15 is a non-inverted input terminal IN+ that receives reference voltage Vref. The base of the transistor Q16 is an inverted input terminal IN− that receives feedback voltage Vadj. In the error amplifier 12, a change in feedback voltage Vadj causes a change in emitter current of the transistor Q16. In order to provide a constant current flow, a constant current source CS11 varies the emitter potentials of the transistors Q15 and Q16, so that the emitter current of the transistor Q15 varies inversely with the emitter current of the transistor Q16. In response, a control voltage Vc, which is extracted from a transistor Q11 on the side of the transistor Q15, is also varied.
For the purpose of preventing output oscillation, DC regulated power supplies such as above generally include a capacitor Co between the output terminal of the power supply and GND. The capacitor Co is serially connected to a resistor ESR, which is a serial equivalent resistor of the capacitor Co.
In a structure where the error amplifier 12 is included in a feedback loop as in the foregoing power supply, a phase shift is generated between the input and output voltages of the error amplifier 12, causing the error amplifier 12 to oscillate. On way to solve such an oscillation is to provide a phase compensation circuit made up of a capacitor C11 and a resistor R12, as shown in FIG. 7 for example. The following describes the phase compensation circuit in detail.
In the error amplifier 12, the same current flows through transistors Q11 and Q12 that make up a current mirror circuit. Similarly, the same current flows through transistors Q13 and Q14 that make up a current mirror circuit. A transistor Q17 is serially connected to the transistor Q11, and the capacitor C11 is connected between the base and collector of the transistor Q17. A transistor Q18 is serially connected to the transistor Q14, and the base and collector of the transistor Q18 is connected to each other. The bases of the transistors Q17 and Q18 are connected to each other via a resistor R11.
When the transistors Q17 and Q18 are turned on, a low-pass filter (phase compensation circuit) realized by the capacitor C11 and resistor R11 is connected to the error amplifier 12. The phase compensation constant of the phase compensation circuit is determined by the time constant C×R, where C is the capacitance of the capacitor C11, and R is the resistance of the resistor R11. The larger the phase compensation constant, the stronger the effect of phase compensation. The frequency characteristic of the error amplifier 12 is determined from a cut-off frequency of the low-pass filter, which is expressed asfo=1/2π(Av×C)Rwhere Av is the voltage gain of the error amplifier 12.
The provision of the low-pass filter in the error amplifier 12 prevents oscillation because it lowers a gain in a high-frequency range (approximately 3 dB) that causes oscillation.
One conventional example of phase compensation by error amplifier is Japanese Publication for Unexamined Patent Application No. 111722/1998 (Tokukaihei 10-111722; published on Apr. 28, 1998) (corresponding U.S. Pat. No. 5,859,757), which discloses a power supply with an error amplifier that is connected to an external phase compensation capacitor.
In small-package DC regulated power supplies with a small current output (output current Io≦200 mA) for use in portable phones or other portable devices, there has been demand for externally providing a capacitor of a small capacitance and using such capacitor as an output capacitor, so that the mount area for the power supply in the device can be reduced. Such demand has encouraged development of many types of small-current-output DC regulated power supplies that allow the use of ceramic capacitor for the output capacitor. These DC regulated power supplies have been put to actual applications.
Meanwhile, many desktop apparatuses such as CD-ROM apparatuses and DVD-ROM apparatuses use a DC regulated power supply of an intermediate current range (generally from 300 mA to 500 mA). Miniaturization (both size and thickness) of these apparatuses has created demand for high-density packaging of the apparatus components (including power supply). Therefore, the market demand for externally providing a ceramic capacitor as the output capacitor to reduce the mount area in the apparatus has also been strong in the DC regulated power supplies that produce an intermediate output current of about 500 mA.
The size and thickness of the apparatus can be desirably reduced when the output capacitor is realized by a chip-stacked ceramic capacitor, which has a relatively large capacitance for its small size. FIG. 8 represents an equivalent circuit of such a chip-stacked ceramic capacitor.
The large capacitance of the chip-stacked ceramic capacitor is realized by the stacked structure of dielectric. The ceramic capacitor is an electrical equivalent of a circuit in which individual capacitors CI1 through CIn are connected to one another in parallel. When each capacitance of the capacitors CI1 through CIn is C0, the total capacitance of the ceramic capacitor is n×C0. The respective series equivalent resistors ESR1 through ESRn of the capacitors CI0 through CIn are also provided in parallel. Thus, when each resistance of the series equivalent resistors ESR1 through ESRn is R0, the series equivalent resistance of the chip-stacked ceramic capacitor is given by n×R0.
However, owning to such a structure, the series equivalent resistance of the chip-stacked ceramic capacitor is relatively low as compared with other types of capacitors, such as a tantalum capacitor or an A1 electrolytic capacitor. Accordingly, the output phase of the power supply using the chip-stacked ceramic capacitor tends to run fast, making the power supply susceptible to output oscillation.
The susceptibility to output oscillation is even more prominent in an intermediate-current power supply with an output current of about 500 mA, because it produces a larger output current than the small-current power supply and the output impedance of the output transistor is accordingly smaller. For example, a required capacitance of the output capacitor is about 10 μF in the intermediate-current power supply, compared with 2.2 μF for the capacitor used in the small-output power supply. Despite the large capacitance it provides, the use of chip-stacked ceramic capacitor as the output capacitor is therefore not suitable for actual applications due to its susceptibility to output oscillation.
FIG. 9 is a graph representing a relationship between output current and output noise level of power supplies. The graph plots output noise level characteristics of a small-current power supply (150 mA) and an intermediate-current power supply (500 mA), which are respectively indicated by solid line and broken line, when the capacitance of the output capacitor is held at a constant level (1.0 μF). Note that, the graph uses the logarithm scale.
It can be seen from the graph that the output noise level of the small-current power supply increases abruptly, i.e., output oscillation is generated, when the output current falls below about 5 mA. In contrast, in the intermediate-current power supply, the output noise level increases abruptly (output oscillation is generated) when the output current exceeds about 200 mA. The intermediate-current power supply operates on an intermediate current range (200 mA to 500 mA), which falls outside of the current range for the small-current power supply. In the intermediate current range, oscillation is caused when the phase margin of the output section is reduced by the reduced output impedance of the output transistor.
In order to solve this problem, the DC regulated power supply enhances the effect of phase compensation in the error amplifier, so that output oscillation can be prevented. However, with the strong phase compensation, response characteristics suffer, and particularly the response of the output section becomes poor when there is an abrupt output current increase. FIG. 10 represents such output response (“load response characteristic” hereinafter).
It can be seen from the graph that the output voltage Vo of the conventional DC regulated power supply instantaneously drops to about 0.5V in response to a load fluctuation, as indicated by solid line, before it levels off to a constant level slightly below the original value prior to the load fluctuation. When the rated output voltage is 3.3V, the decrement of the instantaneous voltage drop should preferably be about 3% of the rated output voltage, i.e., about 0.1V. However, due to the poor output characteristic, it has been difficult with the conventional DC regulated power supply to achieve such a small value.